Wiring topology display program, wiring topology display method, and information processing device

Japanese Patent JP6365264

B2

A wiring topology display method, includes: obtaining layout information indicating positions of components and wiring coupling the components; dividing first wiring into first pieces of partial wiring, and generating partial wiring information indicating the first pieces of partial wiring; identifying a first length of the partial wiring and a first angle of the partial wiring for a vector; identifying combinations of second pieces of partial wiring based on the first length and the first angle, the second pieces of partial wiring having second lengths which are a certain length or more, second angles which are different by a certain angle, and a distance which is a certain distance or less; identifying a group having the combinations including pieces of identical partial wiring; and symbolizing third pieces of partial wiring at both ends of the group and fourth pieces of partial wiring between the third pieces of partial wiring.

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Yoshiyuki Iwakura
Hidenobu Shiihara
Tsunami Iwasaki

JP2014237725A

August 01, 2018

November 25, 2014

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富士通株式会社

G06F17/50

JP9325973A
JP2001134631A

Akinori Sakai

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