CIRCUIT DESIGN FOR UNIVERSAL CHAOTIC SYSTEM

WIPO Patent Application WO/2016/033917

A1

Disclosed is a circuit design for a universal chaotic system. A row of holes are welded at various connecting ends. Connecting wires can be inserted in the row of holes, and repeated use is achieved. Four groups of reversed-phase adders and four groups of reversed-phase integrators are constituted using operational amplifiers U1, operational amplifiers U2, resistors and capacitors. Each group of the reversed-phase adders has four paths of input ends. Each path of the input ends leads out four input signals. Four groups of inverters are constituted using operational amplifiers U3, resistors and capacitors. Multiplications are achieved respectively using multipliers U4, U5, U6 and U7. Each group of outputs leads out two paths of outputs, namely positive signals and negative signals. Each path of output signals leads out five output ends. The operational amplifiers U1, the operational amplifiers U2 and the operational amplifiers U3 use LF347N. The multipliers U4 and U5 use AD633JN. A circuit for the universal chaotic system has both the flexibility of a breadboard and the reliability of a printed circuit board (PCB), overcomes the weakness that an element is frequently replaced due to the fact that each system corresponds to a circuit in an existing universal chaotic circuit at the same time, and thus has stronger universality and reliability.

WANG ZHONGLIN (CN)

PCT/CN2015/000262

March 10, 2016

April 14, 2015

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WANG ZHONGLIN (CN)

H04L9/00

CN201336097Y	2009-10-28
CN102739392A	2012-10-17
CN104184576A	2014-12-03
CN102752100A	2012-10-24
CN102752099A	2012-10-24

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