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Title:
INTEGRATION OF ALD/CVD BARRIERS WITH POROUS LOW K MATERIALS
Document Type and Number:
WIPO Patent Application WO2004064147
Kind Code:
A3
Abstract:
A method for processing substrates is provided. The method includes depositing and etching a low k dielectric layer on a substrate, pre-cleaning the substrate with a plasma, and depositing a barrier layer on the substrate. Pre-cleaning the substrate minimizes the diffusion of the barrier layer into the low k dielectric layer and/or enhances the deposition of the barrier layer.

Inventors:
CHUNG HUA
BEKIARIS NIKOLAOS
MARCADAL CHRISTOPHE
CHEN LING
Application Number:
PCT/US2003/040857
Publication Date:
September 02, 2004
Filing Date:
December 19, 2003
Export Citation:
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Assignee:
APPLIED MATERIALS INC (US)
International Classes:
C23C16/34; H01B13/00; H01L21/285; H01L21/311; H01L21/768; H01L21/306; (IPC1-7): H01L21/768
Foreign References:
EP1081751A22001-03-07
US20020060363A12002-05-23
US6495447B12002-12-17
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