Title:
METHOD FOR MANUFACTURING ELECTRONIC COMPONENT MOUNT BOARD AND ELECTRONIC MOUNT BOARD MANUFACTURED BY THIS METHOD
Document Type and Number:
WIPO Patent Application WO/2004/064150
Kind Code:
A1
Abstract:
An electronic component mount board is manufactured by the following method. Firstly, build-up insulation layers (21a-21f) and build-up wiring patterns (22a-22f) are alternately formed on the surface (1a) of a metallic support substrate (1) (Build-up lamination step). Next, a through-hole (11) from the back face (1b) of the support substrate (1) to the front face (1a) is formed to expose the back face (211a) of the innermost build-up insulation layer (21a) (Perforation step). Further, an electronic component (3) is mounted on the back face (211a) of the innermost build-up insulation layer (21a) via the through hole (11) of the support substrate (1) (Mounting step).
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Inventors:
TANI MOTOAKI (JP)
YAMAGISHI YASUO (JP)
YAMAGISHI YASUO (JP)
Application Number:
PCT/JP2003/000326
Publication Date:
July 29, 2004
Filing Date:
January 16, 2003
Export Citation:
Assignee:
FUJITSU LTD (JP)
TANI MOTOAKI (JP)
YAMAGISHI YASUO (JP)
TANI MOTOAKI (JP)
YAMAGISHI YASUO (JP)
International Classes:
H01L21/48; H01L21/68; H01L23/498; H05K3/46; H01L21/56; H05K1/05; H05K1/11; H05K3/00; H05K3/10; (IPC1-7): H01L23/12
Foreign References:
US20020001937A1 | 2002-01-03 | |||
US6031284A | 2000-02-29 | |||
JP2002319760A | 2002-10-31 | |||
JP2002026171A | 2002-01-25 |
Attorney, Agent or Firm:
Yoshida, Minoru (Tamatsukuri-motomachi Tennoji-k, Osaka-shi Osaka, JP)
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