Title:
LAMINATED STRUCTURE, MANUFACTURING METHOD FOR LAMINATED STRUCTURE, AND SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2024/048394
Kind Code:
A1
Abstract:
The present invention includes: an amorphous substrate having an insulating surface; an alignment pattern formed on the amorphous substrate; an insulating layer that is in contact with a side surface of the alignment pattern and that surrounds a peripheral edge section of the alignment pattern; and a gallium nitride-containing semiconductor pattern formed on the alignment pattern. The insulating layer has a first region that overlaps with the semiconductor pattern, and a second region that does not overlap with the semiconductor pattern. An upper surface of the second region is located below an upper surface of the first region. The insulating layer has, in the second region, a side surface that is continuous with the upper surface of the first region.
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Inventors:
AOKI HAYATA (JP)
NISHIMURA MASUMI (JP)
NISHIMURA MASUMI (JP)
Application Number:
PCT/JP2023/030337
Publication Date:
March 07, 2024
Filing Date:
August 23, 2023
Export Citation:
Assignee:
JAPAN DISPLAY INC (JP)
International Classes:
H01L21/3065; C30B25/06; C30B29/38; H01L21/338; H01L29/778; H01L29/812; H01L33/22; H01L33/32
Domestic Patent References:
| WO2022113949A1 | 2022-06-02 | |||
| WO2021187077A1 | 2021-09-23 | |||
| WO2020188851A1 | 2020-09-24 |
Foreign References:
| JP2004137135A | 2004-05-13 | |||
| JPH11243229A | 1999-09-07 |
Attorney, Agent or Firm:
TAKAHASHI, HAYASHI AND PARTNER PATENT ATTORNEYS, INC. (JP)
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