PANEL ARRAY SHORT CIRCUIT DETECTION METHOD AND APPARATUS, ELECTRONIC DEVICE, AND STORAGE MEDIUM

WIPO Patent Application WO/2023/029491

A1

The present application relates to the field of data processing technologies, and provides a panel array short circuit detection method and apparatus, an electronic device, and a storage medium. The method comprises: obtaining a defect feature region and good feature regions of a panel to be detected image and feature points of the good feature regions by using a feature region of a defect-free feature unit as a reference feature region and by means of a target detection model; then determining feature points associated with the defect feature regions as reference points according to the position of the defect feature region, and constructing, on the basis of specifications specified for feature units, feature units corresponding to the reference points; and on this basis, detecting the number of intersections of the defect feature region and the feature units corresponding to the associated reference points, and determining, on the basis of the number of intersections, whether the defect type of the defect feature region is a short circuit. Thus, the problem in the prior art that whether the type of an identified defect formed in an array panel etching process is a short circuit cannot be accurately determined can be alleviated.

FANG YUKE (CN)
SUN CHONGJING (CN)
TANG JUN (CN)
CAO BIN (CN)

PCT/CN2022/086952

March 09, 2023

April 15, 2022

Click for automatic bibliography generation  

CHENGDU SHULIANYUNSUAN TECH CORPORATION (CN)

G06K9/62

CN113469293A	2021-10-01
CN111353983A	2020-06-30
CN111932515A	2020-11-13
US20210012474A1	2021-01-14

CHOFN INTELLECTUAL PROPERTY (CN)

View/Download PDF      PDF Help

Previous Patent: PARAMETER CALCULATION METHOD FOR TWO-PHASE COLD PLATE

Next Patent: SYSTEM AND METHOD FOR SITE-SPECIFIC INTEGRATION OF EXOGENOUS GENES