Title:
PICTURE PROCESSING APPARATUS
Document Type and Number:
WIPO Patent Application WO/1986/006188
Kind Code:
A1
Abstract:
A plurality of picture element data stored in first and second frame memories are transferred in parallel onto first and second shift registers. These two shift registers are then shifted in synchronism with each other, and two sets of picture element data that are successively obtained are operated by an arithmetic circuit, and results of the operation are returned back to the first shift register. When one course of operation of picture is finished, a plurality of operation results stored in the first shift register are transferred in parallel to the original positions of the first frame memory, in order to carry out at high speeds the logic operation between the two pictures.
Inventors:
KURAKAKE MITSUO (JP)
OTSUKA SHOICHI (JP)
OTSUKA SHOICHI (JP)
Application Number:
PCT/JP1986/000186
Publication Date:
October 23, 1986
Filing Date:
April 14, 1986
Export Citation:
Assignee:
FANUC LTD (JP)
International Classes:
G06F7/38; G06T1/20; G06T1/60; G06T3/00; G06T7/00; (IPC1-7): G06F15/66
Foreign References:
| JPS60128572A | 1985-07-09 | |||
| JPS57182784A | 1982-11-10 | |||
| JPS4413308B1 |
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