Title:
PREPARATION METHOD FOR SEMICONDUCTOR STRUCTURE, AND SEMICONDUCTOR STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2024/026928
Kind Code:
A1
Abstract:
The present disclosure relates to a preparation method for a semiconductor structure, and the semiconductor structure. The method comprises: providing a substrate, and forming on the substrate an initial stacked structure that comprises a first dielectric layer and a target semiconductor layer, which are sequentially and alternately stacked in a first direction, the first dielectric layer being adjacent to the substrate; forming, in the initial stacked structure, a first trench isolation structure, a second trench isolation structure and a third trench isolation structure, which are arranged at intervals in a second direction and extend in a third direction; forming two spaced gate trenches, with bottom surfaces thereof being in contact with an upper surface of the substrate, and the portion of the target semiconductor layer located in the gate trenches being exposed and suspended; and forming, in the gate trenches, gate structures that surround the target semiconductor layer.
Inventors:
WANG HONG (CN)
LI XIAOJIE (CN)
LI XIAOJIE (CN)
Application Number:
PCT/CN2022/112651
Publication Date:
February 08, 2024
Filing Date:
August 16, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L29/78; H01L21/28; H01L21/336; H01L29/06
Domestic Patent References:
| WO2017171845A1 | 2017-10-05 |
Foreign References:
| US20170323953A1 | 2017-11-09 | |||
| CN114121820A | 2022-03-01 | |||
| US20210118884A1 | 2021-04-22 | |||
| CN111863609A | 2020-10-30 | |||
| CN114141712A | 2022-03-04 | |||
| CN103915441A | 2014-07-09 |
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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