Title:
PREPARATION METHOD FOR SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2024/027332
Kind Code:
A9
Abstract:
Provided in the embodiments of the present disclosure are a preparation method for a semiconductor structure and a semiconductor structure. The preparation method for a semiconductor structure comprises: providing a substrate; forming on the substrate stacked structures arranged at intervals in a first direction, each stacked structure comprising first sacrificial layers and semiconductor pillars which are alternately stacked in the vertical direction; forming isolation structures, the isolation structures being located between the adjacent stacked structures in the first direction; etching the isolation structures to form through holes, the through holes exposing part of the surface of the substrate and further exposing the side surface of each stacked structure, the width of the bottom of each through hole being greater than that of the top of the through hole in a second direction, and the second direction being perpendicular to the first direction; and transversely etching the first sacrificial layers exposed by the through holes, and removing part of the first sacrificial layers to expose the top surface and the bottom surface of each semiconductor pillar. The embodiments of the present disclosure at least help to improve the morphology of the formed semiconductor structures.
Inventors:
TANG YI (CN)
Application Number:
PCT/CN2023/098676
Publication Date:
March 28, 2024
Filing Date:
June 06, 2023
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H10B12/00; H01L21/762
Attorney, Agent or Firm:
SHANGHAI CHENHAO INTELLECTUAL PROPERTY LAW FIRM GENERAL PARTNERSHIP (CN)
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