SEMICONDUCTOR DEVICE

WIPO Patent Application WO/2023/047227

A1

Provided is a semiconductor device capable of achieving a high-integrated or minute arrangement. This semiconductor device comprises a transistor. The transistor includes an oxide, first and second conductors provided on the oxide, a first insulator provided on the first and second conductors, a second insulator provided in an opening of the first insulator, a third insulator provided on the second insulator, a fourth insulator provided on the third insulator, and a third conductor provided on the fourth insulator. The opening has a region overlapping the oxide. The third conductor has a region overlapping the oxide with the second to fourth insulators therebetween. The second insulator comes into contact with each of the upper surface of the oxide and the side wall of the opening. The second insulator has a smaller thickness than the third insulator. The fourth insulator is less transmissible against oxygen than the third insulator. In a cross-sectional view of the transistor in a channel longitudinal direction, the width of the third conductor is 3-15 nm.

KUNITAKE HITOSHI (JP)
HODO RYOTA (JP)
JINBO YASUHIRO (JP)
KURATA MOTOMU (JP)
SASAGAWA SHINYA (JP)
FUKUSHIMA KUNIHIRO (JP)
YAMAZAKI SHUNPEI (JP)

PCT/IB2022/058438

March 30, 2023

September 08, 2022

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SEMICONDUCTOR ENERGY LAB (JP)

H01L29/786; H01L21/26; H01L21/268; H01L21/28; H01L21/324; H01L21/336; H01L21/428; H01L21/768; H01L21/822; H01L21/8234; H01L23/532; H01L27/04; H01L27/06; H01L27/088; H01L29/417; H01L29/423; H01L29/49; H01L29/788; H01L29/792; H10B12/00; H10B41/70; H10B99/00

WO2019171205A1

2019-09-12

JP2014116591A	2014-06-26
JP2013168642A	2013-08-29

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