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Title:
SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR, AND MEMORY AND PREPARATION METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2023/245744
Kind Code:
A1
Abstract:
Provided in the embodiments of the present disclosure is a semiconductor structure. The semiconductor structure comprises: a substrate, a plurality of capacitors located in the substrate, and a plurality of active pillars located above the substrate, wherein the plurality of active pillars are arranged above the plurality of capacitors in a manner of corresponding to each other on a one-to-one basis, and the bottom of each active pillar is electrically connected to the top of the capacitor therebelow.

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Inventors:
CAO KANYU (CN)
LEE TZUNG-HAN (CN)
LIU CHIH-CHENG (CN)
YANG HUAIWEI (CN)
Application Number:
PCT/CN2022/104707
Publication Date:
December 28, 2023
Filing Date:
July 08, 2022
Export Citation:
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Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L27/108; H01L21/8242
Foreign References:
CN114551450A2022-05-27
CN109411473A2019-03-01
CN203774319U2014-08-13
CN112864158A2021-05-28
CN112909001A2021-06-04
Other References:
See also references of EP 4322219A4
Attorney, Agent or Firm:
CHINA PAT INTELLECTUAL PROPERTY OFFICE (CN)
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