Title:
STATIC RANDOM-ACCESS MEMORY AND FAULT DETECTION CIRCUIT THEREOF
Document Type and Number:
WIPO Patent Application WO/2021/135427
Kind Code:
A1
Abstract:
A static random-access memory and a fault detection circuit thereof. The fault detection circuit comprises: a bit line coupling circuit, coupled between a first bit line and a second bit line, and used for coupling a bit line having a higher potential in the first bit line and the second bit line to a floating low potential using a bit line having a lower potential in the first bit line and the second bit line when performing a data write operation on a memory cell under a test mode by means of a write circuit, wherein the first bit line and the second bit line are a pair of logical complementary bit lines; and a fault determining circuit, used for obtaining write data and read data corresponding to the write data when the memory cell is under the test mode, comparing the write data and the read data, and determining whether the static random-access memory has a data retention fault on the basis of the comparison result. By means of the solution, the fault detection accuracy can be improved.
Inventors:
PENG ZENGFA (CN)
Application Number:
PCT/CN2020/117029
Publication Date:
July 08, 2021
Filing Date:
September 23, 2020
Export Citation:
Assignee:
SPREADTRUM COMM SHANGHAI CO (CN)
International Classes:
G11C29/04
Foreign References:
| CN111161785A | 2020-05-15 | |||
| CN1662997A | 2005-08-31 | |||
| CN101236791A | 2008-08-06 | |||
| CN105448329A | 2016-03-30 | |||
| CN104700889A | 2015-06-10 | |||
| US20190051370A1 | 2019-02-14 | |||
| US7471579B2 | 2008-12-30 |
Attorney, Agent or Firm:
UNITALEN ATTORNEYS AT LAW (CN)
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