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Title:
半導体装置の駆動方法
Document Type and Number:
Japanese Patent JP6677449
Kind Code:
B2
Abstract:
A semiconductor device in which operation delay can be suppressed is provided. The semiconductor device includes a first logic element, a second logic element, a first circuit that has a function of controlling conduction between the first logic element and the second logic element, and a fourth circuit. The fourth circuit is electrically connected to the first circuit, and is electrically connected to the second logic element.

Inventors:
Yuki Okamoto
Yoshimoto Kurokawa
Application Number:
JP2015045474A
Publication Date:
April 08, 2020
Filing Date:
March 09, 2015
Export Citation:
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Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H03K19/17736; H01L21/82; H01L21/822; H01L27/04
Domestic Patent References:
JP2013251894A
JP2013243657A
JP2014038684A