Title:
ソース線プルダウン機構を備えた人工ニューラルネットワーク内のアナログニューラルメモリアレイ
Document Type and Number:
Japanese Patent JP7474870
Kind Code:
B2
Abstract:
Numerous embodiments of analog neural memory arrays are disclosed. Certain embodiments contain improved mechanisms for pulling source lines down to ground expeditiously. This is useful, for example, to minimize the voltage drop for a read, program, or erase operation.
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Inventors:
Tran, Huban
Boo, Sun
Hong, Stanley
Trin, Stefan
Trang, Han
Tiwari, bipin
Pam, Hien
Boo, Sun
Hong, Stanley
Trin, Stefan
Trang, Han
Tiwari, bipin
Pam, Hien
Application Number:
JP2022567747A
Publication Date:
April 25, 2024
Filing Date:
November 16, 2020
Export Citation:
Assignee:
SILICON STORAGE TECHNOLOGY, INC.
International Classes:
G11C16/26; G06G7/60; G06N3/065; G11C11/54
Domestic Patent References:
| JP2000251489A | ||||
| JP2005311207A |
Foreign References:
| WO2019212699A1 | ||||
| US20180061502 | ||||
| US20150213900 |
Attorney, Agent or Firm:
Patent Attorney Corporation Wisdom International Patent and Trademark Office
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