Title:
ARITHMETIC CIRCUIT
Document Type and Number:
Japanese Patent JP3477094
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To obtain a signal which is the square of an AC signal, without distortion in a MOS transistor (TR) circuit.
SOLUTION: The drain current of a 1st MOS TR M1, whose gate receives a signal resulting from superimposing an AC signal onto a DC voltage and that is operated and a drain current of a 2nd MOS TR M2 whose gate receives a signal resulting from superimposing an AC signal onto a DC voltage with an inverted phase to each other and that is operated, are summed, and a drain current of a 3rd MOS TR M3 whose gate receives a DC voltage and that is operated is subtracted from the sum, so that the DC components of the 1st and 2nd MOS TRs are removed. Thus, a current proportional to the square of the AC signal can be produced independently of the threshold of the TRs.
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Inventors:
Hideyuki Hagino
Susumu Hoshino
Susumu Hoshino
Application Number:
JP35602098A
Publication Date:
December 10, 2003
Filing Date:
December 15, 1998
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G06F7/556; G06G7/14; G06G7/20; H03D1/18; H03F1/32; (IPC1-7): H03F1/32; G06G7/20
Domestic Patent References:
| JP8315056A | ||||
| JP10229311A |
Attorney, Agent or Firm:
Takehiko Suzue (6 outside)
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