Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
MULTIPLICATION/ADDITION ARITHMETIC CIRCUIT
Document Type and Number:
Japanese Patent JPH04167170
Kind Code:
A
Abstract:

PURPOSE: To perform a multiplication/addition arithmetic operation continuously and at high speed by clipping a computed result to a positive maximum value when overflow occurs to a positive side and a value nearest to a negative maximum value expressible in an arithmetic and logical unit when the overflow occurs to a negative side.

CONSTITUTION: When the overflow occurs, an overflow signal line 100 goes to '1'. An overflow clipping circuit 21, when detecting the fact that the overflow signal line 100 goes to '1', checks a code bit outputted from the arithmetic and logic unit(ALU) 15, and performs such control to input clipped data from a clip data input terminal 101 when the code bit shows '0', and to fix the output of each selector 22 at positive maximum value. Also, when the code bit shows '1', the output of each selector 22 in the overflow clipping circuit 21 is controlled so as to be fixed at the negative maximum value.


More Like This:
Inventors:
FUKUDA MITSUYOSHI
Application Number:
JP29502590A
Publication Date:
June 15, 1992
Filing Date:
October 31, 1990
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SANYO ELECTRIC CO
International Classes:
G06F7/38; G06F7/00; G06F7/76; G06F17/10; H03H17/02; (IPC1-7): G06F7/00; G06F7/38; G06F15/31; H03H17/02
Attorney, Agent or Firm:
Kenji Yoshida (2 outside)