Title:
BIPOLAR MULTIPLIER
Document Type and Number:
Japanese Patent JP2888212
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a bipolar multiplier that is formed on a semiconductor integrated circuit, is operated at a low voltage and has an input voltage range or both input voltage ranges and preferably a completely linear input voltage range of about 1VP-P.
SOLUTION: The bipolar multiplier is provided with voltage - current (V-I) conversion circuits 11, 12 each receiving a lst differential input signal signal and each having output pairs (2 pairs each), four transistors(TRs) Q5, Q5', Q6, Q6' each pair of which receives a 2nd differential input signal and is driven by 2-pair of output currents of the V-I conversion circuit 11, and a quadri-tail cell whose TRs Q1, Q3, Q4, Q2 receive the emitter outputs of the TRs Q5, Q5', Q6, Q6' respectively as input voltages and driven by a common constant current source I0.
Inventors:
KIMURA KATSUHARU
Application Number:
JP31298896A
Publication Date:
May 10, 1999
Filing Date:
November 08, 1996
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
H01L27/04; G06G7/163; H01L21/822; H03D7/14; H03F3/45; H03F3/68; (IPC1-7): G06G7/163; H01L21/822; H01L27/04; H03D7/14; H03F3/45; H03F3/68
Domestic Patent References:
| JP9282403A | ||||
| JP9219630A |
Attorney, Agent or Firm:
Asato Kato