To obtain a bus transfer device capable of efficiently executing DMA transfer of a packet transmitted/received by one or a plurality of NIC ports at high speed on a PCI bus.
A DMA framer 112 executes the DMA transfer of a DMA frame, to which frame information including a data length for identifying the NIC ports 120-12n handling a packet is added, to the packet temporarily held in a packet buffer 113. The DMA framer 112 extracts a packet from the DMA frame including the packet, which is DMA-transferred via the PCI bus 104 and destined to the NIC ports 120-12n, and transmits it to the NIC ports 120-12n. When the DMA transfer is finished, an interrupt factor presenting device 114 presents an interrupt factor of an interrupt signal asserted by a PCI bus interface 111.
YASUI NAOHIKO
YASUI NAOHIKO
JPH11120115A | 1999-04-30 | |||
JPH11513150A | 1999-11-09 | |||
JP2000276357A | 2000-10-06 | |||
JP2003085129A | 2003-03-20 | |||
JPH10117349A | 1998-05-06 | |||
JP2002538723A | 2002-11-12 |
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