PURPOSE: To eliminate a problem of mutual connectivity by executing a header error check by two AND conditions.

CONSTITUTION: A header CRC arithmetic part 100 outputs a result of CRC operation to an output line 11. A cell input 1 is inputted to a shift register 101 of 5 bytes length simultaneously with the CRC arithmetic part 100 and stores a header part of 5 bytes at the time of CRC operation. Subsequently, a comparator 102 outputs an output 12 which becomes true at the time when a header of the contents of the shift register 101 is not all '0' data, AND is taken by an AND gate (AND) 103 together with the CRC operation result 11 by the header CRC arithmetic part 100, and a header check output 2 is outputted to a cell synchronization protecting part 20. That is, when there is no error in the result of CRC operation of data which is received successively, and also, the header part is not all '0', it is decided that a header area is detected, and cell synchronization is taken. Accordingly, an erroneous cell synchronization caused by all '0' data can be prevented.