Title:
CIRCUIT DEVICE AND ITS MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2008187144
Kind Code:
A
Abstract:
To provide a circuit device in which a structure for sealing a hybrid IC provided on the upper surface of a circuit substrate is simplified, and to provide its manufacturing method.
The hybrid IC device 10 comprises a circuit substrate 11 having a peripheral portion 12 formed flatly and a recess 36 depressed in the thickness direction, an insulating layer 20 formed on the bottom 14 of the recess 36, a hybrid IC composed of a conductive pattern 22 and a circuit element 24 formed on the surface of the insulating layer 20, and a lead 28 bonded to a pad 26 composed of the conductive pattern 22 and led out of the recess 36 of the circuit substrate 11.
More Like This:
WO/1997/008751 | IMAGING SYSTEM AND METHOD |
JP3983711 | Surface mount high frequency module |
JP2010107388 | MULTICHIP PACKAGE |
Inventors:
SAITO HIDESHI
TAKAKUSAKI SADAMICHI
SAKAMOTO NORIAKI
TAKAKUSAKI SADAMICHI
SAKAMOTO NORIAKI
Application Number:
JP2007021811A
Publication Date:
August 14, 2008
Filing Date:
January 31, 2007
Export Citation:
Assignee:
SANYO ELECTRIC CO
SANYO SEMICONDUCTOR CO LTD
SANYO SEMICONDUCTOR CO LTD
International Classes:
H01L25/04; H01L25/18
Domestic Patent References:
JPH11204904A | 1999-07-30 | |||
JPH0964580A | 1997-03-07 | |||
JPH07326708A | 1995-12-12 | |||
JPS62109417A | 1987-05-20 | |||
JPS6381954A | 1988-04-12 | |||
JPH07202475A | 1995-08-04 | |||
JP2001244127A | 2001-09-07 | |||
JPH0730215A | 1995-01-31 | |||
JPH0722720A | 1995-01-24 | |||
JPS59198793A | 1984-11-10 | |||
JPS605589A | 1985-01-12 | |||
JPS61270152A | 1986-11-29 | |||
JPS61166560U | 1986-10-16 | |||
JPS6390875U | 1988-06-13 |
Attorney, Agent or Firm:
Takashi Okada
Previous Patent: MOUNTING STRUCTURE OF DIODE ON PRINTED WIRING BOARD
Next Patent: MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND MARKING DEVICE
Next Patent: MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND MARKING DEVICE