Title:
基板表面の欠陥検査方法及び装置
Document Type and Number:
Japanese Patent JP5760129
Kind Code:
B2
Abstract:
A method for detecting surface defects, such as slip line type defects, on a substrate designed to be used in electronics, optoelectronics or analogue, including projection of a pattern of light fringes and dark bands onto the substrate, relative displacement of the substrate relative to the pattern, acquisition of a sequence of at least three images of the pattern reflected by the substrate to a sensor, the images corresponding to displacement of the fringes of the pattern, determination of the gradient of the surface of the substrate using displacements of fringes of the pattern, and determination of the presence of a surface defect on the substrate using variations in the gradient of the surface of the substrate. Another embodiment comprises a device using said method.
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Inventors:
Mulan, Cecil
Moritz, Sophie
Gustald, Felipe
Berger, Francois
Decker, Jean-Le
Blanc, Patrice
Marville, Christoph
Moritz, Sophie
Gustald, Felipe
Berger, Francois
Decker, Jean-Le
Blanc, Patrice
Marville, Christoph
Application Number:
JP2014159099A
Publication Date:
August 05, 2015
Filing Date:
August 04, 2014
Export Citation:
Assignee:
S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
ALTATECH SEMICONDUCTOR
ALTATECH SEMICONDUCTOR
International Classes:
G01B11/25; G01N21/956; G01B11/26; G01B11/30; G01N21/88; H01L21/66
Domestic Patent References:
| JP2005347448A | ||||
| JP2001124538A | ||||
| JP11287641A | ||||
| JP2004184397A | ||||
| JP11148813A |
Attorney, Agent or Firm:
Seishin ip patent business corporation