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Patent Searching and Data


Title:
DETECTOR
Document Type and Number:
Japanese Patent JPS6083138
Kind Code:
A
Abstract:

PURPOSE: To detect the variation of two words at a high speed by using a multiplexer, a register, an EXOR group, a priority encoder, a decoder and a control circuit respectively to constitute a variation detecting circuit for two words.

CONSTITUTION: The 1st and 2nd words serve as an input at one side of a multiplexer 1 consisting of an input 100. An EXOR group 3 obtains an EXOR between an output 110 of the multiplexer 1 and an output 130 of a register 2. A priority encoder 4 supplies the output 130 and delivers an encoding output 140 corresponding to one of plural variation bits. A decoder 5 decodes the output 140 to use it as to input at the other side of the multiplexer 1. A control circuit 6 switches the multiplexer input to an output 150 from a signal 100 after receiving the 1st and 2nd words. Hereafter an encoding output is obtained for each variation bit until the register 2 has no variation bit any more.


Inventors:
KOIKE MASAHIKO
Application Number:
JP19149583A
Publication Date:
May 11, 1985
Filing Date:
October 13, 1983
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F7/04; G06F7/02; (IPC1-7): G06F7/04
Attorney, Agent or Firm:
Uchihara Shin