To increase the data amount to be transmitted between chips by increasing the number of interconnection wires to be connected to the integrated circuit in a multichip module.

A multichip module, having a multisubstrate and a patternized metalization layer formed on each layer of the multilayer substrate, is provided. A multilayer cavity is formed in such a manner that the mounting part of an integrated circuit(IC) 101 comes to the bottom part. A plurality of ICs 101 are attached to the mounting surface of the IC mounting surface of the cavity. The wire bonding 105, which makes the first set, is extended to the exposed part of the patternized metalization layer at least in two layers from an IC 101. Also, the wire bonding 105, which makes the second set, is extended to the bonding pad of the adjacent IC 101 at least from an IC 101. Besides, the wire bonding 105, which makes the third set, is extended at least to the bonding pad of the adjacent IC 101, and the wire bonding 105, which makes the third set, has the loop height higher than the wire bonding 105 which makes the second set.