PURPOSE: To enable an IC test device to be shortened in time required for testing an IC by a method wherein a defective address detected by a circuit test is converted into coordinates data inside the IC chip, and the operation of an EB tester is executed for each defective address.

CONSTITUTION: When the circuit test of an IC chip TP is executed through a circuit tester 300, a defective IC is found, a prober 200 is flipped up, a defective address is converted by a coordinate converting means 400, the converted data are transferred to a controller 107, a program which only tests the defective address is generated by a test program generating means 500 and inputted into a controller 107. An X-Y coordinate drive table 100 is moved to a designated coordinate position in accordance with the program, an X-Y region which contains the defective address is irradiated with an electron beam EB to execute an EB test for analyzing the spot which causes malfunctions. An IC test device can be sharply lessened in time required for alignment and failure analysis, so that a semiconductor memory can be lessened in developing time.