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Title:
IMAGE PLOTTING DEVICE
Document Type and Number:
Japanese Patent JPH10133944
Kind Code:
A
Abstract:

To obtain the device which can slightly suppress the load on a processor without being effected by the shift direction of an access memory address by finding the memory address of the plotting start point of each horizontal line and performing DMA transfer on the basis of a DMA frequency calculated by a DMA counter.

An image plotting arithmetic part 40 divides plotting data on a specific shape into horizontal line components, outputs Y coordinates, and X coordinates of plotting start points and end points in the horizontal lines by the horizontal lines, and outputs plotting data in an image memory space from the plotting start points to the plotting end points. This device finds the memory address of the plotting start point of each horizontal line by using an X coordinate address arithmetic circuit 50, a Y address arithmetic part 51, and a 2nd adding circuit 53. A DMA transfer control circuit 70 calculates the DMA frequency by the DMA counter 60 and performs DMA transfer on the basis of the DMA frequency.


Inventors:
MORITA YUKIAKI
Application Number:
JP28513796A
Publication Date:
May 22, 1998
Filing Date:
October 28, 1996
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F12/02; G06T11/00; G09G5/36; G09G5/393; (IPC1-7): G06F12/02; G06T11/00; G09G5/36
Attorney, Agent or Firm:
Kihei Watanabe



 
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