PURPOSE: To improve execution processing speed in an information processor, by synthesizing a machine language instruction suitable for the characteristics of an application program, and improving an instruction set.
CONSTITUTION: A control part 2 takes out the machine language instruction from a main memory 1, and refers and interprets a control memory 5, and makes a machine language instruction executing part 3 execute the instruction. Simultaneously, a machine language instruction address access frequency measuring part 4 executes the algorithm of a step 1 and a step 2, and finds the address of the machine language instruction having high access frequency. An optimizing part 6 measures the access frequency of the machine language instruction, and synthesizes a machine language instruction string stored in the address having the high access frequency, to a new machine language instruction by optimizing the sequence of microinstruction strings. The instruction set can be improved by adding the above new machine language instruction on a fundamental instruction set.
JP3776644 | PIPELINE ARITHMETIC UNIT |
JP5666473 | Multithreaded data processing system |
WO/1990/010267 | DISTRIBUTED PIPELINE CONTROL FOR A COMPUTER |