To efficiently transmit and receive more debug information with an external debugging device without increasing dedicated debug terminals in a microprocessor including a debug control circuit inputting and outputting debug information.

The internal connection of an internal bus Sc is switched from the internal bus Sb of a microprocessor 1 to a debug control circuit 3 in timing avoiding normal access timing in which information exchange is performed between the microprocessor 1 and an external device. Thus, it is possible to perform the information exchange between the microprocessor 1 and the external device and the transmission and reception of debug information between the microprocessor 1 and a debugging device 2 while sharing the same bus. Consequently, it is possible to transmit and receive much debug information between the microprocessor 1 and the device 2 without expanding a dedicated debug terminal.