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Title:
積層セラミックコンデンサおよびその製造方法
Document Type and Number:
Japanese Patent JP7424740
Kind Code:
B2
Abstract:
A multilayer ceramic capacitor includes: a multilayer structure in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked, wherein concentrations of Mn, Si and B of a margin region are respectively higher than concentrations of Mn, Si and B of the dielectric layers, wherein a donor element concentration of the margin region is lower than a donor element concentration of the dielectric layers, wherein the margin region is at least one of an end margin region and a side margin region.

Inventors:
Noriyuki Chiki
Application Number:
JP2018096107A
Publication Date:
January 30, 2024
Filing Date:
May 18, 2018
Export Citation:
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Assignee:
TAIYO YUDEN CO.,LTD.
International Classes:
H01G4/30
Domestic Patent References:
JP2017011172A
JP2007173714A
JP201738036A
Attorney, Agent or Firm:
Shuhei Katayama