Title:
デジタルタイミング調整のための最適補間器方法および装置
Document Type and Number:
Japanese Patent JP4237143
Kind Code:
B2
Abstract:
A digital timing synchronizer of a receiver is provided for timing synchronization to a transmitter in a wireless communication system, wherein the received signal has a timing error with respect to a reference code. A channel estimator estimates an initial code phase of the received signal. A code generator generates a timing reference code that is adjustable by integer increments. An interpolation feedback circuit is configured for interpolation and correction of the timing error, whereby the interpolation is achieved through an integer code shift, plus a quantized fractional adjustment selected from a look-up table of quantized fractional adjustment values and their associated predetermined interpolator coefficients, from which a time corrected version of the received signal is produced.
Inventors:
I Cout Burtan
Donald M. Grieco
Donald M. Grieco
Application Number:
JP2004541951A
Publication Date:
March 11, 2009
Filing Date:
September 30, 2003
Export Citation:
Assignee:
Interdigital Technology Corporation
International Classes:
H04B1/707; H04B7/02; H04L7/00; H04L7/02; H04L25/02
Domestic Patent References:
| JP9312592A | ||||
| JP10032523A | ||||
| JP9232995A | ||||
| JP2001036430A | ||||
| JP62137931A |
Foreign References:
| WO2002071647A1 |
Attorney, Agent or Firm:
Yoshikazu Tani
Kazuo Abe
Kazuo Abe
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