Title:
PROBE CARD AND TESTING METHOD
Document Type and Number:
Japanese Patent JP3553731
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To enable a probe card to contact all chips on a wafer at a small number of contact times in the case the chips' electrodes are disposed in directions X and Y.
SOLUTION: A base 28 has rectangular openings 30 at the center and mounting frame 32 fixed to the periphery thereof. First and second supports 34 and 36 extending in directions X and Y like a grid are fixed to the frame 32. Electrodes are formed on the marginal areas of chips of a wafer. Probe pins of the first and second supports 34 and 36 respectively contact the electrodes extending in the directions X and Y on the chips. A first simultaneous contact enables the simultaneous test of all the chips belonging to odd rows and then the chip is moved by one-chip-width, relative a probe card to enable the simultaneous test of all the chips belonging to even rows. Thus, the twice simultaneous contact completes the test of all the chips.
Inventors:
Yoshihide Hasegawa
Application Number:
JP11117996A
Publication Date:
August 11, 2004
Filing Date:
April 09, 1996
Export Citation:
Assignee:
Nippon Micronics Co., Ltd.
International Classes:
G01R31/26; G01R1/073; H01L21/66; (IPC1-7): H01L21/66; G01R1/073; G01R31/26
Domestic Patent References:
| JP3231438A |
Attorney, Agent or Firm:
Toshiyuki Suzuki