Title:
半導体装置
Document Type and Number:
Japanese Patent JP6438999
Kind Code:
B2
Abstract:
A semiconductor device capable of high speed operation is provided. Further, a semiconductor device in which change in electric characteristics due to a short channel effect is hardly caused is provided. An oxide semiconductor having crystallinity is used for a semiconductor layer of a transistor. A channel formation region, a source region, and a drain region are formed in the semiconductor layer. The source region and the drain region are formed by self-aligned process in which one or more elements selected from Group 15 elements are added to the semiconductor layer with the use of a gate electrode as a mask. The source region and the drain region can have a wurtzite crystal structure.
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Inventors:
Shunpei Yamazaki
Application Number:
JP2017078082A
Publication Date:
December 19, 2018
Filing Date:
April 11, 2017
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L29/786; H01L21/822; H01L21/8242; H01L21/8244; H01L27/04; H01L27/10; H01L27/108; H01L27/11; H01L27/1156
Domestic Patent References:
| JP2008098447A | ||||
| JP2007123861A | ||||
| JP2010093070A | ||||
| JP200660209A |
Foreign References:
| WO2009091013A1 |