To improve throughput of a semiconductor manufacturing facility by reducing the time required for conveying a wafer.

Wafer processing chambers 4 and 5 and load lock chambers 21 and 22 are provided adjacent to a conveyance chamber 1 having a wafer conveyance robot 17, the load lock chamber is provided with a buffer rack 23 for holding a predetermined number of wafers 20, or further, wafer transfer robots 28 and 29 are provided opposite to the load lock chambers, cassette elevators 30 and 31 capable of receiving and mounting a wafer cassette 12 are provided opposite to the wafer transfer robots, the wafer is put in a standby mode in the load lock chamber before and after wafer processing, or further, the transfer of the wafer between the wafer cassette and the load lock chamber is carried out by the wafer transfer robot.