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Title:
SEMICONDUCTOR MEMORY UNIT
Document Type and Number:
Japanese Patent JPS55113194
Kind Code:
A
Abstract:

PURPOSE: To reduce the power consumption of a static semiconductor memory unit by supplying power from a pulse power supply to memory cells.

CONSTITUTION: A memory cell using enhancement transistors Q1 and Q2 as load transistors is provided so as to form a semiconductor memory unit. Then, this memory cell is supplied with power from pulse power supply PG. When this pulse voltage decreases down to zero, transistors Q1 and Q2 are both OFF and before changes at nodes (a) and (b) damp, a next pulse voltage is applied by fixing the period of the pulse voltage. Therefore, power is consumed only during the application of the pulse voltage and when the pulse voltage is zero, no power is consumed, so that the power consumption can remarkably be reduced.


Inventors:
KURAFUJI SETSUO
Application Number:
JP2009279A
Publication Date:
September 01, 1980
Filing Date:
February 22, 1979
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G11C11/41; G11C11/412; (IPC1-7): G11C11/40



 
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