Title:
SEMICONDUCTOR STORAGE DEVICE
Document Type and Number:
Japanese Patent JP2021044033
Kind Code:
A
Abstract:
To suppress occurrence of error bits and to shorten the total time of write operation.SOLUTION: A semiconductor storage device comprises: a word line connected to a plurality of memory cells; and a controller. The controller performs first program operation for applying first program voltage to the word line in repetition of a program loop, stops first verify operation started after the first program operation when a suspend command is received, performs second program operation for applying first program voltage to the word line when the first verify operation resumed by receiving a resume command is terminated, stops second verify operation started after the second program operation when the suspend command is received, and performs third program operation for applying second program voltage higher than the first program voltage to the word line when the second verify operation resumed by receiving the resume command is terminated.SELECTED DRAWING: Figure 10
Inventors:
NAGAO OSAMU
Application Number:
JP2019163931A
Publication Date:
March 18, 2021
Filing Date:
September 09, 2019
Export Citation:
Assignee:
KIOXIA CORP
International Classes:
G11C11/56; G11C16/08; G11C16/10; G11C16/34
Attorney, Agent or Firm:
Kurata Masatoshi
Nobuhisa Nogawa
Takashi Mine
Naoki Kono
Sanae Kaneko
Nobuhisa Nogawa
Takashi Mine
Naoki Kono
Sanae Kaneko