Title:
MEMORY SYSTEM
Document Type and Number:
Japanese Patent JP2021044034
Kind Code:
A
Abstract:
To provide a very convenient memory system.SOLUTION: A memory controller executes: first reference read processing for reading a plurality of memory cells by using a first reference read voltage; first acquisition processing for acquiring a first histogram indicating the number of memory cells with respect to a threshold voltage based on a result of the first reference read processing; first estimation processing for estimating a real read voltage based on the first histogram and a first estimation function; and first real read processing for reading data by using the real read voltage acquired in the first estimation processing. When data cannot be acquired in the first real read processing, the memory controller executes second estimation processing for estimating a real read voltage by using a second estimation function different from the first estimation function, and second real read processing for reading data by using the real read voltage acquired in the second estimation processing.SELECTED DRAWING: Figure 8
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Inventors:
HORISAKI KOJI
HORIUCHI KAZUO
YAMASHIRO RYO
PARK GIBEOM
EUN YU-YANG
HORIUCHI KAZUO
YAMASHIRO RYO
PARK GIBEOM
EUN YU-YANG
Application Number:
JP2019163969A
Publication Date:
March 18, 2021
Filing Date:
September 09, 2019
Export Citation:
Assignee:
KIOXIA CORP
International Classes:
G11C16/26; G11C11/56; G11C16/08
Attorney, Agent or Firm:
Sakai International Patent Office