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Title:
SEMICONDUCTOR SUBSTRATE
Document Type and Number:
Japanese Patent JPH03173449
Kind Code:
A
Abstract:

PURPOSE: To prevent pitch deviation in automatic positioning by forming discrimination lines with rather large pitches on scribe lines.

CONSTITUTION: A plurality of integrated circuits are formed in an array on a semiconductor substrate 1. Scribe lines 2 to isolate the integrated circuits are formed in a lattice type. Each group A constituted of 20 integrated circuits wherein five integrated circuits are transversely arranged and four integrated circuits are longitudinally arranged is divided by discrimination lines 3 on a substrate 1. The discrimination lines 3 are formed on the scribe lines 2. In this case, a photo mask is moved in the manner in which the scribe lines become thick on the boundaries of blocks of a constant number, and the pattern of integrated circuits is printed on the substrate, thereby forming discrimination lines 3a.


Inventors:
INANO SHIGERU
Application Number:
JP31279989A
Publication Date:
July 26, 1991
Filing Date:
December 01, 1989
Export Citation:
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Assignee:
SUMITOMO ELECTRIC INDUSTRIES
International Classes:
H01L21/301; H01L21/66; H01L21/78; (IPC1-7): H01L21/66; H01L21/78
Attorney, Agent or Firm:
Yoshiki Hasegawa (3 outside)



 
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