Title:
SIGNAL PROCESSOR
Document Type and Number:
Japanese Patent JP3302712
Kind Code:
B2
Abstract:
PURPOSE: To accurately control a controlled system by providing a means which generates an error signal to be inputted to a signal processing means according to a tutor signal generated by a tutor signal generating means and an output signal converted by an output signal converting means.
CONSTITUTION: The output signal o of a neural network 8 is processed by an output part 9 as the output signal converting means and inputted as an output signal y for control to the controlled system 6. The neural network 8 has a self-learning function. The output signal j obtained by the conversion processing of the output part 9 is inputted to an error signal generation part 11 as an error signal generating means together with a real control output or equivalent tutor signal m from a tutor part 10 to be a tutor signal generating means to generate the error signal d to be used for learning, which is inputted to the neural network 8. The neural network 8 performs the learning by using this error signal d and a desired signal y is obtained at the controlled system 6 for a signal x.
Inventors:
Takashi Kitaguchi
Toshiyuki Furuta
Hirotoshi Eguchi
Toshiyuki Furuta
Hirotoshi Eguchi
Application Number:
JP912692A
Publication Date:
July 15, 2002
Filing Date:
January 22, 1992
Export Citation:
Assignee:
株式会社リコー
International Classes:
G05B13/02; G06F15/18; G06G7/60; G06N3/00; G06N3/08; G06N99/00; (IPC1-7): G06N3/08; G05B13/02
Domestic Patent References:
| JP2201607A | ||||
| JP311458A | ||||
| JP60134905A | ||||
| JP2226425A | ||||
| JP2299002A | ||||
| JP4372044A | ||||
| JP5143108A |
Other References:
【文献】国際公開90/2381(WO,A1)
Attorney, Agent or Firm:
Akira Kashiwagi