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Title:
SIGNAL PROCESSOR
Document Type and Number:
Japanese Patent JPH03294979
Kind Code:
A
Abstract:

PURPOSE: To simplify the connection between nerve cell imitation elements by providing a means for setting an output signal line of each neuron simulation element in a forward process to this impedance, coupling this output signal line by plural pieces, and inputting them to the neuron simulation element of the next stage.

CONSTITUTION: A digital circuit consists of a block 100 for showing a line of a network, and a block 101 for showing a neuron unit. Intermediate signals 3d, 3e required for deriving the sum total of an input signal by the neuron unit 101, respectively are controlled by outputting a signal by a control signal, and cutting off a signal output by setting an output signal line in a forward process to high impedance. By providing a means for setting the output signal line in the forward process to high impedance, plural output signal lines can be coupled to one piece of signal line. In such a way, the number of connections to the next stage can be decreased, and the degree of integration of a neural network can be improved.


Inventors:
UEDA HIROO
Application Number:
JP9692390A
Publication Date:
December 26, 1991
Filing Date:
April 11, 1990
Export Citation:
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Assignee:
RICOH KK
International Classes:
G06G7/60; G06F15/18; G06N3/04; G06N99/00; (IPC1-7): G06F15/18; G06G7/60
Attorney, Agent or Firm:
Torii Hiroshi



 
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