Title:
SQUARE-LAW CIRCUIT
Document Type and Number:
Japanese Patent JP2738205
Kind Code:
B2
Abstract:
PURPOSE: To provide the square-law circuit of novel configuration having a wide input voltage range.
CONSTITUTION: In the two pairs of paired transistors to be driven by a constant current source Io at an equal value, one pair is provided with Darlington- connected transistors (Q1a and Q1b) and a transistor Q2 equipped with an emitter resistor R, and the other pair is provided with a transistor Q3 having the emitter resistor R and Darlington-connected transistors (Q4a and Q4b). Mutually between these two pairs of paired transistors, a differential input pair to be impressed an input voltage V1 is constituted by respectively connecting the base of the transistor Q2 (Q3) and the base of the transistor Q4a (Q1a) in common, and a differential output pair to which a differential output current (Ik, Iu) flow is constituted by respectively connecting the collectors of the transistors Q2 and Q3 and the collectors of the transistors Q1a, Q1b, Q4a and Q4b in common.
Inventors:
KIMURA KATSUHARU
Application Number:
JP7263092A
Publication Date:
April 08, 1998
Filing Date:
February 21, 1992
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
G06G7/20; (IPC1-7): G06G7/20
Domestic Patent References:
| JP6324377A |
Attorney, Agent or Firm:
Hachiman Yoshihiro
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