Title:
SUBTRACTION CIRCUIT
Document Type and Number:
Japanese Patent JP3876145
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a subtraction circuit capable of accurately and rapidly carrying out a subtraction process.
SOLUTION: The subtraction circuit is provided with a serially connected switching element and capacitative element between an output terminal and a ground of an operational amplifier. Through the switching element, the capacitative element is electrically connected with the output terminal of the operation amplifier in a sampling period of a signal, and it is electrically disconnected from the output terminal of the operational amplifier after the sampling period. By this, a high frequency component of the signal leaking to an output terminal side of the operational amplifier during the sampling period is absorbed, and the subtraction process can be accurately and rapidly carried out.
Inventors:
Ueno Masayuki
Application Number:
JP2001324503A
Publication Date:
January 31, 2007
Filing Date:
October 23, 2001
Export Citation:
Assignee:
Kawasaki Microelectronics, Inc.
International Classes:
G06G7/14; H03H19/00; (IPC1-7): G06G7/14; H03H19/00
Domestic Patent References:
| JP57113178A | ||||
| JP59158616A | ||||
| JP3033988A |
Attorney, Agent or Firm:
Nozomi Watanabe
Haruko Sanwa
Haruko Sanwa