To provide an analog calculation means by which an exact operation is made possible in a high frequency band.
A calculation circuit (10) which is operated in a modulation area and generates a signal having phase modulation in proportion to ratio between a dividend (numerator) signal and a divisor (denominator) signal is disclosed. In one embodiment, a quotient signal of a base band is generated by demodulating the phase modulated signal by a phase demodulator (104). The divisor signal maintains inverse proportion control of a modulation gain of a modulator by changing a carrier wave infusion level and thus, higher bandwidth and accuracy, smaller drift and offset in comparison with that of the conventional analog calculation technique are realized. In one embodiment, a circuit includes all linear elements even when a division function is a nonlinear function. The circuit and a method are operated when an inputted signal is analog or one or both are in the modulation area.
| JPS5461579 | MULTIPLIER |
| WO/2005/015383 | SWITCHED CHARGE MULTIPLIER-DIVIDER |
| JPS5348440 | MULTIPLIER CIRCUIT |
Takahiko Mizobe
Kiyoharu Nishiyama