THIN FILM TRANSISTOR AND ITS MANUFACTURE

Japanese Patent JP3474604

B2

PURPOSE: To provide a method by which a TFT which has an LDD or offset structure and is reduced in drain current at the turning-off time can be manufactured with accuracy through simple processes.
CONSTITUTION: The TFT has a semiconductor thin film 2 formed of Si, etc., on an insulating substrate 1, gate insulating film 3 formed on the entire surface of the thin film 2, and gate electrode formed on the film 3. The thickness of the film 3 is changed by forming a step section at the point where the film 3 becomes wider than the electrode 4 and LDD areas 5 are formed by implanting ions into the areas 5 by using the electrode and film 3 as masks. Thus a TFT having an LDD structure containing an LDD area 5 and source and drain areas 6 is obtained. When the thin film 2 in the LDD area 5 or in the offset area is made thinner than that in a channel area, a TFT having another structure can be obtained.

WO/2016/006641	METHOD FOR PRODUCING SiC WAFER, METHOD FOR PRODUCING SiC SEMICONDUCTOR, AND GRAPHITE-SILICON CARBIDE COMPOSITE SUBSTRATE
JPS5621319	MANUFACTURE OF SEMICONDUCTOR DEVICE
JPS59119767	MANUFACTURE OF SEMICONDUCTOR DEVICE

Kazuhiro Kobayashi
Kazuhiko Noguchi
Yuzo Ohdoi
Yuu Nishimura
Kisumi Hisatoshi
Masami Hayashi

JP12268093A

December 08, 2003

May 25, 1993

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Mitsubishi Electric Corporation

H01L21/265; H01L21/266; H01L21/336; H01L29/78; H01L29/786; (IPC1-7): H01L21/336; H01L21/265; H01L29/786

JP4196328A
JP62174973A
JP6120249A
JP4360580A
JP3165575A
JP5929289A
JP555249A
JP6232398A
JP6232160A

Sota Asahina (1 person outside)

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