Title:
THIN-FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF
Document Type and Number:
Japanese Patent JP2003069030
Kind Code:
A
Abstract:
To provide a thin-film transistor having high reliability and good characteristics at a process temperature ≤500°C by using low price non-annealed glass as a substrate.
The surface of a polycrystalline silicon film doped with boron (B) or phosphorus (P) is oxidized by using ozone to form a silicon oxide film of 4-20 nm on the surface of the polycrystalline silicon. Through this treatment, the interfacial structure of the gate insulating layer/channel layer becomes controllable so that the thin-film transistor having less variation of characteristics can be manufactured on the anneal-free glass substrate.
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Inventors:
HORIKOSHI KAZUHIKO
OGATA KIYOSHI
TAMURA TAKUO
NAKAHARA MIWAKO
OKURA OSAMU
ORITSUKI RYOJI
NAKANO YASUSHI
SHIBA TAKEO
OGATA KIYOSHI
TAMURA TAKUO
NAKAHARA MIWAKO
OKURA OSAMU
ORITSUKI RYOJI
NAKANO YASUSHI
SHIBA TAKEO
Application Number:
JP2001257127A
Publication Date:
March 07, 2003
Filing Date:
August 28, 2001
Export Citation:
Assignee:
HITACHI LTD
International Classes:
G02F1/1368; G09F9/00; G09F9/30; G09F9/35; H01L21/336; H01L29/49; H01L29/786; (IPC1-7): H01L29/786; G02F1/1368; G09F9/00; G09F9/30; G09F9/35; H01L21/336
Domestic Patent References:
JPH1079516A | 1998-03-24 | |||
JPH04177765A | 1992-06-24 | |||
JPH1197691A | 1999-04-09 | |||
JPH04326731A | 1992-11-16 | |||
JPH08195494A | 1996-07-30 |
Attorney, Agent or Firm:
Sakuta Yasuo