To provide a time division switch reducing the circuit scale and having a low power consumption.

The time division switch comprises a plurality of input high- ways 10, one output high-way 50, a selector 20 for selecting only data to be output from a plurality of input time division data 1 on he input high-ways 10, a data memory 30 for holding data corresponding to each output time slot, and an output multiplexing circuit 40 for sequentially selecting the output from the memory 30, multiplexing the outputs, and outputting output multiplexing time division data to an output high-way 50.