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Patent Searching and Data


Title:
INTERRUPTION CONTROL CIRCUIT
Document Type and Number:
Japanese Patent JPS607540
Kind Code:
A
Abstract:

PURPOSE: To omit shunt and reset processings for the contents of a register for interruption processing and to shorten the overall processing time by providing a pair of register programs for main program processing and plural pairs of register groups equivalent to the number of types of interruptions to each interruption processing.

CONSTITUTION: An interruption IT1 is produced while a control circuit 1 is executing the processing in accordance with a main program. In such a case, a register group selection circuit 7 selects a register group Reg1 corresponding to the IT1. Thus the signal which is so far connected to a register group Reg0 from a register selection circuit 2 is connected to the group Reg1. Then a register is selected out of the group Reg1 for the interruption processing to the IT1. When the processing is through for the interruption, the circuit 2 is connected to the group Reg0 by the function of the circuit 7. In such a way, the exclusive register groups are provided to each type of interruption in addition to the register group exclusive for main program. As a result, the shunt and reset processings can be omitted for the contents of registers.


Inventors:
TAKAHASHI TAKANORI
Application Number:
JP11460983A
Publication Date:
January 16, 1985
Filing Date:
June 24, 1983
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G06F9/46; G06F9/48; (IPC1-7): G06F9/46
Attorney, Agent or Firm:
Masuo Oiwa