PURPOSE: To speed up arithmetic processing by adding an information processor which has one-word, n-byte constitution and performs word-by-word data transfer and hardware dedicated to data positioning and code extension.
CONSTITUTION: Data read out of a main storage device, word by word, is stored in a data register 1 and the low-order (l) bits of a readout address are stored in a register 2. For arithmetic processing, the data is sent from the register 1 to a function circuit 3. The circuit 3 is given the position of necessary data in one read word by the register 2 and also supplied with the length of data to be processed and an instruction for arithmetic format through a line 15. The circuit 3 when commanded to perform k-byte arithmetic shifts the data in the register 1 to right by n-(m+k) bytes according to the address (m) set in the register 2 to set a sign in the left-hand side (n-k) bytes, and the resulting data is supplied to a logical operation circuit 4 to perform the prescribed arithmetic. Thus, program steps are decreased to realize high-speed processing.
Next Patent: ACCESS CONTROLLER FOR COMMON-USE MEMORY