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Title:
WAFER BACK SIDE SPUTTERING METHOD AND SEMICONDUCTOR MANUFACTURING APPARATUS
Document Type and Number:
Japanese Patent JP2001093863
Kind Code:
A
Abstract:

To provide a back side sputtering method and a semiconductor device manufacturing apparatus for implementing the sputtering method, where the stress of a metallic film formed on the back side of a wafer for forming semiconductor elements is small and hence the wafer warps less even its thickness becomes reduced.

A conductive film 7 is formed on the back side of a wafer 1 by sputtering, such that a lattice-shaped region, an island-shaped region 8 and a pit-shaped region are formed separately by at least one chip-forming region basis. The film 7 is formed by using a mask, having desired pattern holes formed in advance so that metal is deposited only on portions corresponding to the holes by sputtering. Using the film 7 thus prepared, the stress caused over the entire surface of the wafer can be reduced, with the result that the warpage of the wafer is reduced.


Inventors:
NUNOTANI NOBUHITO
Application Number:
JP27078599A
Publication Date:
April 06, 2001
Filing Date:
September 24, 1999
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L21/301; H01L21/203; H01L21/285; H01L29/78; (IPC1-7): H01L21/285; H01L29/78
Attorney, Agent or Firm:
Toshi Takemura