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Title:
SEMICONDUCTOR WAFER FIXING JIG AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2001093864
Kind Code:
A
Abstract:

To provide a semiconductor wafer fixing jig and a method of manufacturing a semiconductor device, capable of suppressing quality degradation due to the breakage and chipping of wafers during their thickness-reducing grinding and transfer and hence reducing costs.

A wafer-fixing jig 22 comprises a plate 23 which has a plurality of through-holes in its surface, and which is at least equal or larger in size than a semiconductor wafer, and a resin portion 24 having through-holes 25 formed at locations corresponding to the through-holes in the plate 23 and a plurality of non-through holes 26 arranged adjacent to these holes 25. The jib 22 is placed on a main surface 20' of the wafer with the surface of the portion 24 facing the surface 20', and pressure is then applied to the plate 23, whereby the portion 24 is pressed to push out the air from the non-through holes, and the negative pressure in the non-through holes thus allows the jig 22 to suck and hold the wafer.


Inventors:
TOKUBUCHI KEISUKE
NUMATA HIDEO
Application Number:
JP26991499A
Publication Date:
April 06, 2001
Filing Date:
September 24, 1999
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L21/683; H01L21/301; H01L21/304; H01L21/50; (IPC1-7): H01L21/301
Attorney, Agent or Firm:
Takehiko Suzue (6 outside)