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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Document Type and Number:
Japanese Patent JP2001093860
Kind Code:
A
Abstract:

To provide a semiconductor device having a MISFET whose parasitic capacitance is small, and a method of manufacturing the semiconductor device.

This semiconductor device comprises a semiconductor substrate 1, an interlayer insulating film 9 formed on a main surface of the substrate 1 and having a groove 10 whose bottom surface is formed of the main surface, a gate electrode 14 arranged inside the groove 10, and a gate insulating film 11 formed on the bottom and side surfaces of the electrode 14. Over the front surface region of the main surface of the substrate 1, impurity diffused layers 5 are provided on both sides of the electrode 14. The distance between the main surface of the substrate 1 and the bottom surface of the electrode 14 is longer at both ends of the electrode 14, than in the central portion of the electrode 14.


Inventors:
AKASAKA YASUSHI
Application Number:
JP26835699A
Publication Date:
April 06, 2001
Filing Date:
September 22, 1999
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L29/78; H01L21/28; H01L21/336; (IPC1-7): H01L21/28; H01L21/336; H01L29/78
Attorney, Agent or Firm:
Takehiko Suzue (6 outside)