Title:
WEIGHTED AVERAGE VALUE CALCULATING CIRCUIT
Document Type and Number:
Japanese Patent JP3479506
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To realize a circuit for calculating a weighted average value of a plurality of input signals output by a forward rotation without offset in a small area with small power consumption.
SOLUTION: The weighted average value calculating circuit comprises an inverter amplifier, a plurality of capacitors C1 to Cn connected to input terminal of the amplifier, switches SW1 to SWn for connecting the capacitors C1 to Cn to the input terminal or an output terminal of the amplifier, and a switch SW0 provided between the input and the output of the amplifier. When a signal voltage is applied to the respective capacitors while the SW0 is conducted at the signal input time and the SW0 is non-conducted at the signal output time and the capacitors C1 to Cn are connected in parallel between the input and the output of the amplifier and the output signal Vout is read, a weighted average value output standardized as a forward rotation output including no offset is obtained.
Inventors:
Masayuki Uno
Application Number:
JP2000317998A
Publication Date:
December 15, 2003
Filing Date:
October 18, 2000
Export Citation:
Assignee:
Linear Cell Design Co., Ltd.
International Classes:
H03M1/74; G06G7/14; (IPC1-7): H03M1/74
Domestic Patent References:
JP5235761A | ||||
JP6291608A | ||||
JP5457850A | ||||
JP11355101A |
Attorney, Agent or Firm:
Hiroaki Saegusa
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